{"id":4018,"date":"2025-07-25T00:00:00","date_gmt":"2025-07-25T00:00:00","guid":{"rendered":"https:\/\/lp.szlogic.cn\/glossary\/what-is-phy-physical-layer-basics-explained\/"},"modified":"2026-06-22T08:47:44","modified_gmt":"2026-06-22T08:47:44","slug":"what-is-phy-physical-layer-basics-explained","status":"publish","type":"post","link":"https:\/\/resources.l-p.com\/pt\/glossary\/what-is-phy-physical-layer-basics-explained","title":{"rendered":"What Is Ethernet PHY? Understanding the Ethernet Physical Layer Transceiver"},"content":{"rendered":"
\"What<\/figure>\n\n\n\n

PHY stands for “Physical Layer,” which forms the first and lowest layer in the OSI model. The physical layer handles the actual transmission and reception of raw data bits over media such as cables, fiber optics, or wireless signals. PHY converts digital data into electrical, optical, or radio signals, making basic device connectivity possible. Because PHY directly affects signal quality and network performance, understanding it is essential for anyone interested in networking and communication technologies. <\/p>\n\n\n\n

In networking hardware design, the Ethernet PHY<\/strong> (Physical Layer Transceiver) is a critical component that bridges the digital world of MAC controllers and the physical cabling or fiber used for data transmission. This article explains what an Ethernet PHY is, outlines its key functions, explores how it interfaces with magnetics, and highlights how LINK\u2011PP RJ45 connectors<\/a> support optimal PHY integration.<\/p>\n\n\n\n

What Is an Ethernet PHY?<\/h2>\n\n\n\n

A PHY<\/strong> implements the OSI model\u2019s physical layer<\/strong>, turning digital frames into analog signals that travel over twisted pair or optical media, and vice versa. It typically includes both the Physical Coding Sublayer (PCS)<\/strong> and the Physical Medium Dependent (PMD)<\/strong> interface for electrical or optical media.<\/p>\n\n\n\n

On the digital end, the PHY connects to the MAC<\/strong> (Media Access Control) via standard interfaces such as MII, RMII, RGMII, or SGMII<\/strong>.<\/p>\n\n\n\n

\"Ethernet<\/figure>\n\n\n\n

Core Functions of an Ethernet PHY<\/h2>\n\n\n\n
    \n

  1. Signal Conversion (Digital ↔ Analog):<\/strong> Converts MAC\u2011layer bitstreams to electrical or optical signals suitable for transmission, and recovers digital data on reception.<\/p><\/li>

  2. Coding & Modulation:<\/strong> Handles encoding standards like MLT\u20113 (100BASE\u2011TX), PAM\u20115 (1000BASE\u2011T), or PAM\u201116 (10GBASE\u2011T) depending on Ethernet generation.<\/p><\/li>

  3. Clock\/Data Recovery:<\/strong> Synchronizes and recovers clock from the received signal\u2019s transitions.<\/p><\/li>

  4. Auto\u2011Negotiation & Link Detection:<\/strong> Negotiates link speed (10\/100\/1000 Mbps or above) and duplex mode, and establishes or monitors link status.<\/p><\/li>\n<\/ol>\n\n\n\n

    Line Driver Output Mode:<\/strong> Manages whether the PHY uses current\u2011mode<\/strong> (current source differential output) or voltage\u2011mode<\/strong> (voltage swing output), influencing its compatibility with transformers and RF performance.<\/p>\n\n\n\n

    Note:<\/strong> PAM-16 is the modulation scheme used in the IEEE 802.3an standard for 10GBASE-T Ethernet. It requires complex Forward Error Correction<\/strong> (FEC) mechanisms to ensure signal integrity over twisted-pair cabling.<\/p><\/blockquote>\n\n\n\n

    Current\u2011Mode vs Voltage\u2011Mode PHY<\/h2>\n\n\n\n